Hold-in, pull-in and lock-in ranges for phase-locked loop with tangential characteristic of the phase detector

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Hold-in, pull-in and lock-in ranges for phase-locked loop with tangential characteristic of the phase detector. / Blagov, M. V.; Kuznetsova, O. A.; Kudryashova, E. V.; Kuznetsov, N. V.; Mokaev, T. N.; Mokaev, R. N.; Yuldashev, M. V.; Yuldashev, R. V.

In: Procedia Computer Science, Vol. 150, 01.01.2019, p. 558-566.

Research output: Contribution to journal › Conference article › peer-review

BibTeX

@article{c6a5540d00504313b2d8556ab01d9dfb,

title = "Hold-in, pull-in and lock-in ranges for phase-locked loop with tangential characteristic of the phase detector",

abstract = "In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.",

keywords = "Capture range, Hold-in range, Lock-in range, Nonlinear analysis, Phase-locked loop, PLL, Pull-in range",

author = "Blagov, {M. V.} and Kuznetsova, {O. A.} and Kudryashova, {E. V.} and Kuznetsov, {N. V.} and Mokaev, {T. N.} and Mokaev, {R. N.} and Yuldashev, {M. V.} and Yuldashev, {R. V.}",

year = "2019",

month = jan,

day = "1",

doi = "10.1016/j.procs.2019.02.093",

language = "English",

volume = "150",

pages = "558--566",

journal = "Procedia Computer Science",

issn = "1877-0509",

publisher = "Elsevier",

note = "13th International Symposium on Intelligent Systems, INTELS 2018 ; Conference date: 22-10-2018 Through 24-10-2018",

}

RIS

TY - JOUR

T1 - Hold-in, pull-in and lock-in ranges for phase-locked loop with tangential characteristic of the phase detector

AU - Blagov, M. V.

AU - Kuznetsova, O. A.

AU - Kudryashova, E. V.

AU - Kuznetsov, N. V.

AU - Mokaev, T. N.

AU - Mokaev, R. N.

AU - Yuldashev, M. V.

AU - Yuldashev, R. V.

PY - 2019/1/1

Y1 - 2019/1/1

N2 - In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.

AB - In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.

KW - Capture range

KW - Hold-in range

KW - Lock-in range

KW - Nonlinear analysis

KW - Phase-locked loop

KW - PLL

KW - Pull-in range

UR - http://www.scopus.com/inward/record.url?scp=85064440101&partnerID=8YFLogxK

U2 - 10.1016/j.procs.2019.02.093

DO - 10.1016/j.procs.2019.02.093

M3 - Conference article

AN - SCOPUS:85064440101

VL - 150

SP - 558

EP - 566

JO - Procedia Computer Science

JF - Procedia Computer Science

SN - 1877-0509

T2 - 13th International Symposium on Intelligent Systems, INTELS 2018

Y2 - 22 October 2018 through 24 October 2018

ER -

ID: 42959458