Research output: Contribution to journal › Conference article › peer-review
In the present paper the phase-locked loop (PLL), an electric circuit widely used in telecommunications and computer architectures is considered. A new modification of the PLL with tangential phase detector characteristic and active proportionally-integrating (PI) filter is introduced. Hold-in, pull-in and lock-in ranges for given circuit are studied rigorously. It is shown that lock-in range of the new PLL model is infinite, compared to the finite lock-in range of the classical PLL.
Original language | English |
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Pages (from-to) | 558-566 |
Number of pages | 9 |
Journal | Procedia Computer Science |
Volume | 150 |
DOIs | |
State | Published - 1 Jan 2019 |
Event | 13th International Symposium on Intelligent Systems, INTELS 2018 - St. Petersburg, Russian Federation Duration: 22 Oct 2018 → 24 Oct 2018 |
ID: 42959458