Результаты исследований: Публикации в книгах, отчётах, сборниках, трудах конференций › статья в сборнике материалов конференции › научная › Рецензирование
Phase locked loops design and analysis. / Kuznetsov, Nikolay V.; Leonov, Gennady A.; Seledzhi, Svetlana S.
ICINCO 2008 - 5th International Conference on Informatics in Control, Automation and Robotics, Proceedings. 2008. стр. 114-118 (ICINCO 2008 - 5th International Conference on Informatics in Control, Automation and Robotics, Proceedings; Том SPSMC).Результаты исследований: Публикации в книгах, отчётах, сборниках, трудах конференций › статья в сборнике материалов конференции › научная › Рецензирование
}
TY - GEN
T1 - Phase locked loops design and analysis
AU - Kuznetsov, Nikolay V.
AU - Leonov, Gennady A.
AU - Seledzhi, Svetlana S.
PY - 2008
Y1 - 2008
N2 - New methods, for the design of different block diagrams of PLL, using the asymphtotic analysis of high-frequency periodic oscillations, are suggested. The PLL description on three levels is made: 1) on the level of electronic realizations; 2) on the level of phase and frequency relations between inputs and outputs in block diagrams; 3) on the level of differential and integro-differential equations. On the base of such description, the block diagram of floating PLL for the elimination of clock skew and that of frequency synthesizer is proposed. The rigorous mathematical formulation of the Costas loop for the clock oscillators are first obtained. The theorem on a PLL global stability is proved.
AB - New methods, for the design of different block diagrams of PLL, using the asymphtotic analysis of high-frequency periodic oscillations, are suggested. The PLL description on three levels is made: 1) on the level of electronic realizations; 2) on the level of phase and frequency relations between inputs and outputs in block diagrams; 3) on the level of differential and integro-differential equations. On the base of such description, the block diagram of floating PLL for the elimination of clock skew and that of frequency synthesizer is proposed. The rigorous mathematical formulation of the Costas loop for the clock oscillators are first obtained. The theorem on a PLL global stability is proved.
KW - Costas loop
KW - Mathematical model
KW - Phase-locked loops
KW - Stability
UR - http://www.scopus.com/inward/record.url?scp=58149154826&partnerID=8YFLogxK
U2 - 10.5220/0001485401140118
DO - 10.5220/0001485401140118
M3 - Conference contribution
SN - 9789898111326
T3 - ICINCO 2008 - 5th International Conference on Informatics in Control, Automation and Robotics, Proceedings
SP - 114
EP - 118
BT - ICINCO 2008 - 5th International Conference on Informatics in Control, Automation and Robotics, Proceedings
T2 - 5th International Conference on Informatics in Control, Automation and Robotics, ICINCO 2008
Y2 - 11 May 2008 through 15 May 2008
ER -
ID: 90380939