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Improving circuit size upper bounds using SAT-solvers. / Kulikov, Alexander S.

Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. стр. 305-308 (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; Том 2018-January).

Результаты исследований: Публикации в книгах, отчётах, сборниках, трудах конференцийстатья в сборнике материалов конференциинаучнаяРецензирование

Harvard

Kulikov, AS 2018, Improving circuit size upper bounds using SAT-solvers. в Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, Том. 2018-January, Institute of Electrical and Electronics Engineers Inc., стр. 305-308, 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018, Dresden, Германия, 19/03/18. https://doi.org/10.23919/DATE.2018.8342026

APA

Kulikov, A. S. (2018). Improving circuit size upper bounds using SAT-solvers. в Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 (стр. 305-308). (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018; Том 2018-January). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.23919/DATE.2018.8342026

Vancouver

Kulikov AS. Improving circuit size upper bounds using SAT-solvers. в Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc. 2018. стр. 305-308. (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018). https://doi.org/10.23919/DATE.2018.8342026

Author

Kulikov, Alexander S. / Improving circuit size upper bounds using SAT-solvers. Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018. Institute of Electrical and Electronics Engineers Inc., 2018. стр. 305-308 (Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018).

BibTeX

@inproceedings{bc8ca4f903e94549aeda4a181b72ccdd,
title = "Improving circuit size upper bounds using SAT-solvers",
abstract = "Boolean circuits is arguably the most natural model for computing Boolean functions. Despite intensive research, for many functions, we still do not know what optimal circuits look like. In this paper, we discuss how SAT-solvers can be used for constructing optimal circuits for functions on moderate number of variables. We first discuss why this problem is important and then indicate the current frontiers: what can and cannot be found by state-of-The-Art SAT-solvers, and for what functions we are interested in finding efficient circuits.",
author = "Kulikov, {Alexander S.}",
year = "2018",
month = apr,
day = "19",
doi = "10.23919/DATE.2018.8342026",
language = "English",
series = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "305--308",
booktitle = "Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018",
address = "United States",
note = "2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018 ; Conference date: 19-03-2018 Through 23-03-2018",

}

RIS

TY - GEN

T1 - Improving circuit size upper bounds using SAT-solvers

AU - Kulikov, Alexander S.

PY - 2018/4/19

Y1 - 2018/4/19

N2 - Boolean circuits is arguably the most natural model for computing Boolean functions. Despite intensive research, for many functions, we still do not know what optimal circuits look like. In this paper, we discuss how SAT-solvers can be used for constructing optimal circuits for functions on moderate number of variables. We first discuss why this problem is important and then indicate the current frontiers: what can and cannot be found by state-of-The-Art SAT-solvers, and for what functions we are interested in finding efficient circuits.

AB - Boolean circuits is arguably the most natural model for computing Boolean functions. Despite intensive research, for many functions, we still do not know what optimal circuits look like. In this paper, we discuss how SAT-solvers can be used for constructing optimal circuits for functions on moderate number of variables. We first discuss why this problem is important and then indicate the current frontiers: what can and cannot be found by state-of-The-Art SAT-solvers, and for what functions we are interested in finding efficient circuits.

UR - http://www.scopus.com/inward/record.url?scp=85048895793&partnerID=8YFLogxK

U2 - 10.23919/DATE.2018.8342026

DO - 10.23919/DATE.2018.8342026

M3 - Conference contribution

AN - SCOPUS:85048895793

T3 - Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

SP - 305

EP - 308

BT - Proceedings of the 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 2018 Design, Automation and Test in Europe Conference and Exhibition, DATE 2018

Y2 - 19 March 2018 through 23 March 2018

ER -

ID: 49820586