Nonlinear analysis of the classical phase-locked loop (PLL) is a challenging task. In classical engineering literature simplified mathematical models and simulation are widely used for its study. In this work the limitations of classical engineering phase-locked loop analysis are demonstrated, e.g., hidden oscillations, which can not be found by simulation, are discussed. It is shown that the use of simplified mathematical models and the application of simulation may lead to wrong conclusions concerning the operability of PLL-based circuits.

Original languageEnglish
Title of host publication2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages533-536
Number of pages4
ISBN (Electronic)9781479983919
DOIs
StatePublished - 27 Jul 2015
EventIEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal
Duration: 24 May 201527 May 2015

Publication series

NameProceedings - IEEE International Symposium on Circuits and Systems
Volume2015-July
ISSN (Print)0271-4310

Conference

ConferenceIEEE International Symposium on Circuits and Systems, ISCAS 2015
Country/TerritoryPortugal
CityLisbon
Period24/05/1527/05/15

    Scopus subject areas

  • Electrical and Electronic Engineering

ID: 3982514