Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › Research › peer-review
Nonlinear analysis of the classical phase-locked loop (PLL) is a challenging task. In classical engineering literature simplified mathematical models and simulation are widely used for its study. In this work the limitations of classical engineering phase-locked loop analysis are demonstrated, e.g., hidden oscillations, which can not be found by simulation, are discussed. It is shown that the use of simplified mathematical models and the application of simulation may lead to wrong conclusions concerning the operability of PLL-based circuits.
Original language | English |
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Title of host publication | 2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 533-536 |
Number of pages | 4 |
ISBN (Electronic) | 9781479983919 |
DOIs | |
State | Published - 27 Jul 2015 |
Event | IEEE International Symposium on Circuits and Systems, ISCAS 2015 - Lisbon, Portugal Duration: 24 May 2015 → 27 May 2015 |
Name | Proceedings - IEEE International Symposium on Circuits and Systems |
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Volume | 2015-July |
ISSN (Print) | 0271-4310 |
Conference | IEEE International Symposium on Circuits and Systems, ISCAS 2015 |
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Country/Territory | Portugal |
City | Lisbon |
Period | 24/05/15 → 27/05/15 |
ID: 3982514