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Hold-in, pull-in, and lock-in ranges of PLL circuits : Rigorous mathematical definitions and limitations of classical theory. / Leonov, Gennady A.; Kuznetsov, Nikolay V.; Yuldashev, Marat V.; Yuldashev, Renat V.

In: IEEE Transactions on Circuits and Systems I: Regular Papers, Vol. 62, No. 10, 7277189, 01.10.2015, p. 2454-2464.

Research output: Contribution to journal › Article › peer-review

Harvard

Leonov, GA, Kuznetsov, NV, Yuldashev, MV & Yuldashev, RV 2015, 'Hold-in, pull-in, and lock-in ranges of PLL circuits: Rigorous mathematical definitions and limitations of classical theory', IEEE Transactions on Circuits and Systems I: Regular Papers, vol. 62, no. 10, 7277189, pp. 2454-2464. https://doi.org/10.1109/TCSI.2015.2476295, https://doi.org/10.1109/TCSI.2015.2476295

APA

Leonov, G. A., Kuznetsov, N. V., Yuldashev, M. V., & Yuldashev, R. V. (2015). Hold-in, pull-in, and lock-in ranges of PLL circuits: Rigorous mathematical definitions and limitations of classical theory. IEEE Transactions on Circuits and Systems I: Regular Papers, 62(10), 2454-2464. [7277189]. https://doi.org/10.1109/TCSI.2015.2476295, https://doi.org/10.1109/TCSI.2015.2476295

Vancouver

Leonov GA, Kuznetsov NV, Yuldashev MV, Yuldashev RV. Hold-in, pull-in, and lock-in ranges of PLL circuits: Rigorous mathematical definitions and limitations of classical theory. IEEE Transactions on Circuits and Systems I: Regular Papers. 2015 Oct 1;62(10):2454-2464. 7277189. https://doi.org/10.1109/TCSI.2015.2476295, https://doi.org/10.1109/TCSI.2015.2476295

Author

Leonov, Gennady A. ; Kuznetsov, Nikolay V. ; Yuldashev, Marat V. ; Yuldashev, Renat V. / Hold-in, pull-in, and lock-in ranges of PLL circuits : Rigorous mathematical definitions and limitations of classical theory. In: IEEE Transactions on Circuits and Systems I: Regular Papers. 2015 ; Vol. 62, No. 10. pp. 2454-2464.

BibTeX

@article{69eb7cb1377d4737b9fa26afa4092beb,
title = "Hold-in, pull-in, and lock-in ranges of PLL circuits: Rigorous mathematical definitions and limitations of classical theory",
abstract = "The terms hold-in, pull-in (capture), and lock-in ranges are widely used by engineers for the concepts of frequency deviation ranges within which PLL-based circuits can achieve lock under various additional conditions. Usually only non-strict definitions are given for these concepts in engineering literature. After many years of their usage, F. Gardner in the 2nd edition of his well-known work, Phaselock Techniques, wrote {"}There is no natural way to define exactly any unique lock-in frequency{"} and {"}despite its vague reality, lock-in range is a useful concept.{"} Recently these observations have led to the following advice given in a handbook on synchronization and communications: {"}We recommend that you check these definitions carefully before using them.{"} In this survey an attempt is made to discuss and fill some of the gaps identified between mathematical control theory, the theory of dynamical systems and the engineering practice of phase-locked loops. It is shown that, from a mathematical point of view, in some cases the hold-in and pull-in {"}ranges{"} may not be the intervals of values but a union of intervals and thus their widely used definitions require clarification. Rigorous mathematical definitions for the hold-in, pull-in, and lock-in ranges are given. An effective solution for the problem on the unique definition of the lock-in frequency, posed by Gardner, is suggested.",
keywords = "Analog PLL, Capture range, Cycle slipping, Definition, GARDNER'S paradox on lock-in range, GARDNER'S problem on unique lock-in frequency, Global stability, High-order filter, Hold-in range, Local stability, Lock-in range, Nonlinear analysis, Phase-locked loop, Pull-in range, Stability in the large",
author = "Leonov, {Gennady A.} and Kuznetsov, {Nikolay V.} and Yuldashev, {Marat V.} and Yuldashev, {Renat V.}",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.",
year = "2015",
month = oct,
day = "1",
doi = "10.1109/TCSI.2015.2476295",
language = "English",
volume = "62",
pages = "2454--2464",
journal = "IEEE Transactions on Circuits and Systems",
issn = "1549-8328",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "10",

}

RIS

TY - JOUR

T1 - Hold-in, pull-in, and lock-in ranges of PLL circuits

T2 - Rigorous mathematical definitions and limitations of classical theory

AU - Leonov, Gennady A.

AU - Kuznetsov, Nikolay V.

AU - Yuldashev, Marat V.

AU - Yuldashev, Renat V.

N1 - Publisher Copyright: © 2015 IEEE.

PY - 2015/10/1

Y1 - 2015/10/1

N2 - The terms hold-in, pull-in (capture), and lock-in ranges are widely used by engineers for the concepts of frequency deviation ranges within which PLL-based circuits can achieve lock under various additional conditions. Usually only non-strict definitions are given for these concepts in engineering literature. After many years of their usage, F. Gardner in the 2nd edition of his well-known work, Phaselock Techniques, wrote "There is no natural way to define exactly any unique lock-in frequency" and "despite its vague reality, lock-in range is a useful concept." Recently these observations have led to the following advice given in a handbook on synchronization and communications: "We recommend that you check these definitions carefully before using them." In this survey an attempt is made to discuss and fill some of the gaps identified between mathematical control theory, the theory of dynamical systems and the engineering practice of phase-locked loops. It is shown that, from a mathematical point of view, in some cases the hold-in and pull-in "ranges" may not be the intervals of values but a union of intervals and thus their widely used definitions require clarification. Rigorous mathematical definitions for the hold-in, pull-in, and lock-in ranges are given. An effective solution for the problem on the unique definition of the lock-in frequency, posed by Gardner, is suggested.

AB - The terms hold-in, pull-in (capture), and lock-in ranges are widely used by engineers for the concepts of frequency deviation ranges within which PLL-based circuits can achieve lock under various additional conditions. Usually only non-strict definitions are given for these concepts in engineering literature. After many years of their usage, F. Gardner in the 2nd edition of his well-known work, Phaselock Techniques, wrote "There is no natural way to define exactly any unique lock-in frequency" and "despite its vague reality, lock-in range is a useful concept." Recently these observations have led to the following advice given in a handbook on synchronization and communications: "We recommend that you check these definitions carefully before using them." In this survey an attempt is made to discuss and fill some of the gaps identified between mathematical control theory, the theory of dynamical systems and the engineering practice of phase-locked loops. It is shown that, from a mathematical point of view, in some cases the hold-in and pull-in "ranges" may not be the intervals of values but a union of intervals and thus their widely used definitions require clarification. Rigorous mathematical definitions for the hold-in, pull-in, and lock-in ranges are given. An effective solution for the problem on the unique definition of the lock-in frequency, posed by Gardner, is suggested.

KW - Analog PLL

KW - Capture range

KW - Cycle slipping

KW - Definition

KW - GARDNER'S paradox on lock-in range

KW - GARDNER'S problem on unique lock-in frequency

KW - Global stability

KW - High-order filter

KW - Hold-in range

KW - Local stability

KW - Lock-in range

KW - Nonlinear analysis

KW - Phase-locked loop

KW - Pull-in range

KW - Stability in the large

UR - http://www.scopus.com/inward/record.url?scp=84948451332&partnerID=8YFLogxK

U2 - 10.1109/TCSI.2015.2476295

DO - 10.1109/TCSI.2015.2476295

M3 - Article

VL - 62

SP - 2454

EP - 2464

JO - IEEE Transactions on Circuits and Systems

JF - IEEE Transactions on Circuits and Systems

SN - 1549-8328

IS - 10

M1 - 7277189

ER -

ID: 4005596