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Computation of the lock-in ranges of phase-locked loops with PI filter. / Aleksandrov, Konstantin D.; Kuznetsov, Nikolay V.; Leonov, Gennady A.; Neittaanmäki, Pekka; Yuldashev, Marat V.; Yuldashev, Renat V.

In: IFAC Proceedings Volumes (IFAC-PapersOnline), Vol. 49, No. 14, 2016, p. 36-41.

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@article{dca02c416d60427293ebe4d0c8c7e199,
title = "Computation of the lock-in ranges of phase-locked loops with PI filter",
abstract = "In the present work the lock-in range of PLL-based circuits with proportionally-integrating filter and sinusoidal phase-detector characteristics are studied. Considered circuits have sinusoidal phase detector characteristics. Analytical approach based on the methods of phase plane analysis is applied to estimate the lock-in ranges of the circuits under consideration. Obtained analytical results are compared with simulation results.",
keywords = "Costas loop, hidden oscillations, lock-in range, nonlinear analysis, phase-locked loop, PLL, pull-out frequency",
author = "Aleksandrov, {Konstantin D.} and Kuznetsov, {Nikolay V.} and Leonov, {Gennady A.} and Pekka Neittaanm{\"a}ki and Yuldashev, {Marat V.} and Yuldashev, {Renat V.}",
note = "Publisher Copyright: {\textcopyright} 2016",
year = "2016",
doi = "10.1016/j.ifacol.2016.07.971",
language = "English",
volume = "49",
pages = "36--41",
journal = "IFAC-PapersOnLine",
issn = "2405-8963",
publisher = "Elsevier",
number = "14",

}

RIS

TY - JOUR

T1 - Computation of the lock-in ranges of phase-locked loops with PI filter

AU - Aleksandrov, Konstantin D.

AU - Kuznetsov, Nikolay V.

AU - Leonov, Gennady A.

AU - Neittaanmäki, Pekka

AU - Yuldashev, Marat V.

AU - Yuldashev, Renat V.

N1 - Publisher Copyright: © 2016

PY - 2016

Y1 - 2016

N2 - In the present work the lock-in range of PLL-based circuits with proportionally-integrating filter and sinusoidal phase-detector characteristics are studied. Considered circuits have sinusoidal phase detector characteristics. Analytical approach based on the methods of phase plane analysis is applied to estimate the lock-in ranges of the circuits under consideration. Obtained analytical results are compared with simulation results.

AB - In the present work the lock-in range of PLL-based circuits with proportionally-integrating filter and sinusoidal phase-detector characteristics are studied. Considered circuits have sinusoidal phase detector characteristics. Analytical approach based on the methods of phase plane analysis is applied to estimate the lock-in ranges of the circuits under consideration. Obtained analytical results are compared with simulation results.

KW - Costas loop

KW - hidden oscillations

KW - lock-in range

KW - nonlinear analysis

KW - phase-locked loop

KW - PLL

KW - pull-out frequency

UR - http://www.scopus.com/inward/record.url?scp=84990068711&partnerID=8YFLogxK

U2 - 10.1016/j.ifacol.2016.07.971

DO - 10.1016/j.ifacol.2016.07.971

M3 - Article

VL - 49

SP - 36

EP - 41

JO - IFAC-PapersOnLine

JF - IFAC-PapersOnLine

SN - 2405-8963

IS - 14

ER -

ID: 7591866