TY - GEN

T1 - Circuit depth reductions

AU - Golovnev, Alexander

AU - Kulikov, Alexander S.

AU - Ryan Williams, R.

N1 - Funding Information: Funding Alexander S. Kulikov: Research presented in Section 4 is supported by the RNF grant 18-71-10042. R. Ryan Williams: Supported by NSF CCF-1909429 and CCF-1741615. Publisher Copyright: © Alexander Golovnev, Alexander S. Kulikov, and R. Ryan Williams.

PY - 2021/2/1

Y1 - 2021/2/1

N2 - The best known size lower bounds against unrestricted circuits have remained around 3n for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than 5n. In this work, we propose a non-gate-elimination approach for obtaining circuit lower bounds, via certain depth-three lower bounds. We prove that every (unbounded-depth) circuit of size s can be expressed as an OR of 2s/3.9 16-CNFs. For DeMorgan formulas, the best known size lower bounds have been stuck at around n3-o(1) for decades. Under a plausible hypothesis about probabilistic polynomials, we show that n4-ε-size DeMorgan formulas have 2n1-Ω(ε)-size depth-3 circuits which are approximate sums of n1-Ω(ε)-degree polynomials over F2. While these structural results do not immediately lead to new lower bounds, they do suggest new avenues of attack on these longstanding lower bound problems. Our results complement the classical depth-3 reduction results of Valiant, which show that logarithmic-depth circuits of linear size can be computed by an OR of 2εn nδ-CNFs, and slightly stronger results for series-parallel circuits. It is known that no purely graph-theoretic reduction could yield interesting depth-3 circuits from circuits of super-logarithmic depth. We overcome this limitation (for small-size circuits) by taking into account both the graph-theoretic and functional properties of circuits and formulas. We show that improvements of the following pseudorandom constructions imply super-linear circuit lower bounds for log-depth circuits via Valiant’s reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-3 circuits with constant bottom fan-in. On the other hand, our depth reductions show that even modest improvements of the known constructions give elementary proofs of improved (but still linear) circuit lower bounds.

AB - The best known size lower bounds against unrestricted circuits have remained around 3n for several decades. Moreover, the only known technique for proving lower bounds in this model, gate elimination, is inherently limited to proving lower bounds of less than 5n. In this work, we propose a non-gate-elimination approach for obtaining circuit lower bounds, via certain depth-three lower bounds. We prove that every (unbounded-depth) circuit of size s can be expressed as an OR of 2s/3.9 16-CNFs. For DeMorgan formulas, the best known size lower bounds have been stuck at around n3-o(1) for decades. Under a plausible hypothesis about probabilistic polynomials, we show that n4-ε-size DeMorgan formulas have 2n1-Ω(ε)-size depth-3 circuits which are approximate sums of n1-Ω(ε)-degree polynomials over F2. While these structural results do not immediately lead to new lower bounds, they do suggest new avenues of attack on these longstanding lower bound problems. Our results complement the classical depth-3 reduction results of Valiant, which show that logarithmic-depth circuits of linear size can be computed by an OR of 2εn nδ-CNFs, and slightly stronger results for series-parallel circuits. It is known that no purely graph-theoretic reduction could yield interesting depth-3 circuits from circuits of super-logarithmic depth. We overcome this limitation (for small-size circuits) by taking into account both the graph-theoretic and functional properties of circuits and formulas. We show that improvements of the following pseudorandom constructions imply super-linear circuit lower bounds for log-depth circuits via Valiant’s reduction: dispersers for varieties, correlation with constant degree polynomials, matrix rigidity, and hardness for depth-3 circuits with constant bottom fan-in. On the other hand, our depth reductions show that even modest improvements of the known constructions give elementary proofs of improved (but still linear) circuit lower bounds.

KW - Circuit complexity

KW - Formula complexity

KW - Matrix rigidity

KW - Pseudorandomness

UR - http://www.scopus.com/inward/record.url?scp=85111184675&partnerID=8YFLogxK

U2 - 10.4230/LIPIcs.ITCS.2021.24

DO - 10.4230/LIPIcs.ITCS.2021.24

M3 - Conference contribution

AN - SCOPUS:85111184675

T3 - Leibniz International Proceedings in Informatics, LIPIcs

BT - 12th Innovations in Theoretical Computer Science Conference, ITCS 2021

A2 - Lee, James R.

PB - Schloss Dagstuhl- Leibniz-Zentrum fur Informatik GmbH, Dagstuhl Publishing

T2 - 12th Innovations in Theoretical Computer Science Conference, ITCS 2021

Y2 - 6 January 2021 through 8 January 2021

ER -