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Analysis and synthesis of controlled delay lines for fast digital devices. / Leonov, G. A.

In: Doklady Mathematics, Vol. 80, No. 1, 2010, p. 633-636.

Research output: Contribution to journal › Article › peer-review

Harvard

Leonov, GA 2010, 'Analysis and synthesis of controlled delay lines for fast digital devices', Doklady Mathematics, vol. 80, no. 1, pp. 633-636.

APA

Leonov, G. A. (2010). Analysis and synthesis of controlled delay lines for fast digital devices. Doklady Mathematics, 80(1), 633-636.

Vancouver

Leonov GA. Analysis and synthesis of controlled delay lines for fast digital devices. Doklady Mathematics. 2010;80(1):633-636.

Author

Leonov, G. A. / Analysis and synthesis of controlled delay lines for fast digital devices. In: Doklady Mathematics. 2010 ; Vol. 80, No. 1. pp. 633-636.

BibTeX

@article{fe609a2b247740c380c9a8216cba3b0a,
title = "Analysis and synthesis of controlled delay lines for fast digital devices",
author = "Leonov, {G. A.}",
year = "2010",
language = "не определен",
volume = "80",
pages = "633--636",
journal = "Doklady Mathematics",
issn = "1064-5624",
publisher = "МАИК {"}Наука/Интерпериодика{"}",
number = "1",

}

RIS

TY - JOUR

T1 - Analysis and synthesis of controlled delay lines for fast digital devices

AU - Leonov, G. A.

PY - 2010

Y1 - 2010

M3 - статья

VL - 80

SP - 633

EP - 636

JO - Doklady Mathematics

JF - Doklady Mathematics

SN - 1064-5624

IS - 1

ER -

ID: 5304739